From: Anshul Dalal <anshuld@ti.com>
Date: Thu, 22 May 2025 12:33:04 +0000 (+0530)
Subject: mach-k3: am62ax: enable caches for the SPL stage
X-Git-Tag: v2025.07-rc4~8
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=27cd65ca1bf16c21818c233c6d658f3e747f5e85;p=pandora-u-boot.git

mach-k3: am62ax: enable caches for the SPL stage

board_init_f for the am62a is missing the call to spl_enable_cache which
exists for all other am62 platforms (check am625_init.c &
am62p5_init.c).

This allows the usage of caches while loading and parsing the u-boot.img
FIT resulting in ~2x speedup in the A53 SPL stage.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
---

diff --git a/arch/arm/mach-k3/am62ax/am62a7_init.c b/arch/arm/mach-k3/am62ax/am62a7_init.c
index 28aee34f30b..edd43a1d78d 100644
--- a/arch/arm/mach-k3/am62ax/am62a7_init.c
+++ b/arch/arm/mach-k3/am62ax/am62a7_init.c
@@ -191,6 +191,7 @@ void board_init_f(ulong dummy)
 	if (ret)
 		panic("DRAM init failed: %d\n", ret);
 #endif
+	spl_enable_cache();
 
 	setup_qos();