From: Robert Richter Date: Wed, 6 Oct 2010 10:27:54 +0000 (+0200) Subject: apic, x86: Use BIOS settings for IBS and MCE threshold interrupt LVT offsets X-Git-Tag: v2.6.37-rc1~191^2 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=27afdf2008da0b8878a73e32e4eb12381b84e224;p=pandora-kernel.git apic, x86: Use BIOS settings for IBS and MCE threshold interrupt LVT offsets We want the BIOS to setup the EILVT APIC registers. The offsets were hardcoded and BIOS settings were overwritten by the OS. Now, the subsystems for MCE threshold and IBS determine the LVT offset from the registers the BIOS has setup. If the BIOS setup is buggy on a family 10h system, a workaround enables IBS. If the OS determines an invalid register setup, a "[Firmware Bug]: " error message is reported. We need this change also for upcomming cpu families. Signed-off-by: Robert Richter LKML-Reference: <1286360874-1471-3-git-send-email-robert.richter@amd.com> Signed-off-by: Ingo Molnar --- Reading git-diff-tree failed