From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Wed, 19 Mar 2014 12:06:27 +0000 (+0000)
Subject: ARM: l2c: cns3xxx: remove cache size override
X-Git-Tag: omap-for-v3.16/fixes-against-rc1~91^2~13^2~1^3~43
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=24cb65feab42ac0cc26464ac4b7a38c0ab7ce173;p=pandora-kernel.git

ARM: l2c: cns3xxx: remove cache size override

The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP.  Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code.  Remove them so we can find out which really need
this.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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