From: Vivek Natarajan <vnatarajan@atheros.com>
Date: Thu, 27 Jan 2011 09:15:09 +0000 (+0530)
Subject: ath9k_hw: DDR_PLL and BB_PLL need correct setting.
X-Git-Tag: v2.6.39-rc1~468^2~417^2~41
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=22983c301f01b297a6f85de4757108c6b0eac792;p=pandora-kernel.git

ath9k_hw: DDR_PLL and BB_PLL need correct setting.

Updates from the analog team for AR9485 chipsets to set
DDR_PLL2 and DDR_PLL3. Also program the BB_PLL ki
and kd value.

Signed-off-by: Vivek Natarajan <vnatarajan@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
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