From: Gen FUKATSU <fukatsu.gen@jp.panasonic.com>
Date: Fri, 30 Sep 2005 15:09:17 +0000 (+0100)
Subject: [ARM] 2940/1: Fix BTB entry flush in arch/arm/mm/cache-v6.S
X-Git-Tag: v2.6.14-rc3~43^2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=217874feed0d3a6543a6b7127782f4a08bffd731;p=pandora-kernel.git

[ARM] 2940/1: Fix BTB entry flush in arch/arm/mm/cache-v6.S

Patch from Gen FUKATSU

Invalidate BTB entry instruction flushes two instruction
at a time. Therefore this instruction should be done four
times after invalidate instruction cache line.

Signed-off-by: Gen Fukatsu
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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