From: Olav Haugan <ohaugan@codeaurora.org>
Date: Mon, 4 Aug 2014 18:01:02 +0000 (+0100)
Subject: iommu/arm-smmu: fix programming of SMMU_CBn_TCR for stage 1
X-Git-Tag: fixes-for-v3.18-merge-window~141^2~1^2~5
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1fc870c7efa364862c3bc792cfbdb38afea26742;p=pandora-kernel.git

iommu/arm-smmu: fix programming of SMMU_CBn_TCR for stage 1

Stage-1 context banks do not have the SMMU_CBn_TCR[SL0] field since it
is only applicable to stage-2 context banks.

This patch ensures that we don't set the reserved TCR bits for stage-1
translations.

Cc: <stable@vger.kernel.org>
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
---

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