From: Catalin Marinas <catalin.marinas@arm.com>
Date: Tue, 22 Nov 2011 17:30:29 +0000 (+0000)
Subject: ARM: LPAE: MMU setup for the 3-level page table format
X-Git-Tag: sz_154~166
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1eeaf0ca67f649f09fddb1c51d5613dc5a769646;p=pandora-kernel.git

ARM: LPAE: MMU setup for the 3-level page table format

This patch adds the MMU initialisation for the LPAE page table format.
The swapper_pg_dir size with LPAE is 5 rather than 4 pages. A new
proc-v7-3level.S file contains the TTB initialisation, context switch
and PTE setting code with the LPAE. The TTBRx split is based on the
PAGE_OFFSET with TTBR1 used for the kernel mappings. The 36-bit mappings
(supersections) and a few other memory types in mmu.c are conditionally
compiled.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

Conflicts:

	arch/arm/kernel/head.S
---

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