From: Shobhit Kumar Date: Wed, 11 Dec 2013 12:22:05 +0000 (+0530) Subject: drm/i915: Reorganize the DSI enable/disable sequence X-Git-Tag: v3.14-rc1~47^2~44^2~16 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1dbd7cb256913e5b8d6a4837185b45e3467dff42;p=pandora-kernel.git drm/i915: Reorganize the DSI enable/disable sequence Basically ULPS handling during enable/disable has been moved to pre_enable and post_disable phases. PLL and panel power disable also has been moved to post_disable phase. The ULPS entry/exit sequneces as suggested by HW team is as follows - During enable time - set DEVICE_READY --> Clear DEVICE_READY --> set DEVICE_READY And during disable time to flush all FIFOs - set ENTER_SLEEP --> EXIT_SLEEP --> ENTER_SLEEP Also during disbale sequnece sub-encoder disable is moved to the end after port is disabled. v2: Based on comments from Ville - Detailed epxlaination in the commit messgae - Moved parameter changes out into another patch - Backlight enabling will be a new patch v3: Updated as per Jani's comments - Removed the I915_WRITE_BITS as it is not needed - Moved panel_reset and send_otp_cmds hooks to dsi_pre_enable - Moved disable_panel_power hook to dsi_post_disable - Replace hardcoding with AFE_LATCHOUT v4: Make intel_dsi_device_ready and intel_dsi_clear_device_ready static Signed-off-by: Yogesh Mohan Marimuthu Signed-off-by: Shobhit Kumar Reviewed-by: Jani Nikula Signed-off-by: Daniel Vetter --- Reading git-diff-tree failed