From: Jeff McGee <jeff.mcgee@intel.com>
Date: Sat, 4 Apr 2015 01:13:18 +0000 (-0700)
Subject: drm/i915/bxt: Support BXT in SSEU device status dump
X-Git-Tag: omap-for-v4.2/fixes-rc1^2~17^2~58^2~65^2~8
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1c046bc1db49e5a42e5c4167ac42cee4c1725a37;p=pandora-kernel.git

drm/i915/bxt: Support BXT in SSEU device status dump

Modify the Gen9 SSEU device status logic to support Broxton.
Broxton reuses the Skylake power gate acknowledgment registers but
has at most 1 slice and 3 subslices. Broxton supports subslice
power gating within its single slice.

Signed-off-by: Jeff McGee <jeff.mcgee@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

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