From: Maciej W. Rozycki <macro@linux-mips.org>
Date: Fri, 11 Jul 2008 18:34:36 +0000 (+0100)
Subject: x86: L-APIC: Set IRQ0 as edge-triggered
X-Git-Tag: v2.6.27-rc1~1106^2~18
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1baea6e2fea6f235b21f32a322cb6cb43ffdb704;p=pandora-kernel.git

x86: L-APIC: Set IRQ0 as edge-triggered

 IRQ0 is edge-triggered, but the "8259A Virtual Wire" through the local
APIC configuration in the 32-bit version uses the "fasteoi" handler
suitable for level-triggered APIC interrupt.  Rewrite code so that the
"edge" handler is used.  The 64-bit version uses different code and is
unaffected.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Cc: Matthew Garrett <mjg59@srcf.ucam.org>
Cc: Andreas Herrmann <andreas.herrmann3@amd.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---

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