From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Thu, 26 Jun 2014 14:02:37 +0000 (+0300)
Subject: drm/i915: Parametrize VLV_DDL registers
X-Git-Tag: fixes-against-v3.18-rc2~73^2~78^2~11
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1abc4dc7e2ca7886b6b06bcf2ff1451702c83f9b;p=pandora-kernel.git

drm/i915: Parametrize VLV_DDL registers

The VLV/CHV DDL registers are uniform, and neatly enough the register
offsets are sane so we can easily unify them to a single set of defines
and just pass the pipe as the parameter to compute the register offset.

Note that we now fill out the drain latency for pipe C on CHV which we
didn't do before. The rest of the pipe C watermarks are still untouched
but that will be remedied later by adding a proper cherryview_update_wm()
function.

v2: Add a note about CHV pipe C changes (Paulo)

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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