From: Will Deacon Date: Fri, 21 Feb 2014 16:01:48 +0000 (+0100) Subject: ARM: 7985/1: mm: implement pte_accessible for faulting mappings X-Git-Tag: v3.15-rc1~82^2~1^3~19 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=1971188aa19651d8f447211c6535fb68661d77c5;p=pandora-kernel.git ARM: 7985/1: mm: implement pte_accessible for faulting mappings The pte_accessible macro can be used to identify page table entries capable of being cached by a TLB. In principle, this differs from pte_present, since PROT_NONE mappings are mapped using invalid entries identified as present and ptes designated as `old' can use either invalid entries or those with the access flag cleared (guaranteed not to be in the TLB). However, there is a race to take care of, as described in 20841405940e ("mm: fix TLB flush race between migration, and change_protection_range"), between a page being migrated and mprotected at the same time. In this case, we can check whether a TLB invalidation is pending for the mm and if so, temporarily consider PROT_NONE mappings as valid. This patch implements a quick pte_accessible macro for ARM by simply checking if the pte is valid/present depending on the mm. For classic MMU, these checks are identical and will generate some false positives for PROT_NONE mappings, but this is better than the current asm-generic definition of ((void)(pte),1). Finally, pte_present_user is moved to use pte_valid (and renamed appropriately) since we don't care about cache flushing for faulting mappings. Acked-by: Steve Capper Signed-off-by: Will Deacon Signed-off-by: Russell King --- Reading git-diff-tree failed