From: Michal Simek <monstr@monstr.eu>
Date: Wed, 9 Nov 2011 14:39:58 +0000 (+0100)
Subject: microblaze: Clear all MSR flags on the first kernel instruction
X-Git-Tag: v3.4-rc1~82^2~4
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=173701d7745d07888a929bf08d77d29996ca13dc;p=pandora-kernel.git

microblaze: Clear all MSR flags on the first kernel instruction

The main reason is bug because of dynamic TLB allocation.
U-BOOT didn't disable dcache and then writing to physical address
from ASM wan't visible for reading through MMU.
Disabling caches and clearing all flags from previous code
is good to do so.

Signed-off-by: Michal Simek <monstr@monstr.eu>
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