From: Sergei Shtylyov Date: Tue, 16 May 2006 16:16:41 +0000 (+0400) Subject: NAND: AMD Au1550 driver reads write-only register X-Git-Tag: v2.6.18-rc1~1105^2~97 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=155285c4775b7027b01a5b744c721ae43cced798;p=pandora-kernel.git NAND: AMD Au1550 driver reads write-only register During the last cleanup of the AMD Au1550 NAND driver the old buglet was reintroduced: as the MEM_STNDCTL register is write-only and seem to always read as 0x31, read-modify-write to it done in au1xxx_nand_init() will have the side effect of enabling -RCS0/1 pin override (via bits 4/5 of this reg.), thus possibly causing a contention on the static bus when the NOR flash (using -RCS0) or board control status registers (using -RCS2) are read. Luckily, this goes away with a first NAND access, since au1550_hwcontrol() doesn't try to read this register before writing anymore. Signed-off-by: Sergei Shtylyov Signed-off-by: David Woodhouse --- Reading git-diff-tree failed