From: MyungJoo Ham Date: Sat, 26 Jun 2010 08:21:50 +0000 (+0900) Subject: ARM: S5PV210: Correct clock register properties X-Git-Tag: v2.6.35-rc5~13^2~3 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=154d62e4cdec9eb9271cf57f9d1f57c79c4f4e18;p=pandora-kernel.git ARM: S5PV210: Correct clock register properties 1. Corrected shift values of I2S and UART clocks (CLK_GATE_IP3), which were defined incorrectly. 2. Corrected shift values of sclk_audio, uclk1, sclk_fimd, sclk_mmc, sclk_spi, sclk_pwm, which had duplicated .enable/.ctrlbit with their twins defined in struct clk init_clocks_disable[] and struct clk init_clocks[]. We've changed their .enable/.ctrlbit to use CLK_SRC_MASK register to avoid the duplicated clock problem described below. NOTE: Duplicated Clock Problem Please note that each clock definition should access different control register; otherwise, the system may suffer lockups. For example, if we have two clock definitions "a" and "b" which access the same register (and the shift value). Then, when we do: module A clk = clk_get("a"); clk->clk_enable(clk); module B (context switch) clk = clk_get("b"); clk->clk_enable(clk); do something with clk. clk->clk_disable(clk); module A (context switch) do something with clk * At this point, the system may hang. Therefore, there should be no clock definitions with the same contol register/shift. If we need to create "aliases", then, creating child clocks sharing the clock should be fine. 3. Corrected other sclk_* shift values and access registers. Signed-off-by: MyungJoo Ham Signed-off-by: Kyungmin Park [kgene.kim@samsung.com: minor title and message fix] Signed-off-by: Kukjin Kim --- Reading git-diff-tree failed