From: Catalin Marinas <catalin.marinas@arm.com>
Date: Mon, 15 Aug 2011 10:04:41 +0000 (+0100)
Subject: ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled
X-Git-Tag: v3.1-rc5~9^2~9
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=145e10e173c8adf4804334fb0dd10028300a7a7a;p=pandora-kernel.git

ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled

This patch is a workaround for the 364296 ARM1136 r0p2 erratum (possible
cache data corruption with hit-under-miss enabled). It sets the
undocumented bit 31 in the auxiliary control register and the FI bit in
the control register, thus disabling hit-under-miss without putting the
processor into full low interrupt latency mode.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---

Reading git-diff-tree failed