From: Eugeni Dodonov <eugeni.dodonov@intel.com>
Date: Wed, 9 May 2012 18:37:29 +0000 (-0300)
Subject: drm/i915: add WR PLL programming table
X-Git-Tag: v3.5-rc1~100^2~25^2~15
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=12a13a3389716009db8deb64094656f946e8950d;p=pandora-kernel.git

drm/i915: add WR PLL programming table

This table is used for programming WR PLL clocks, used by HDMI and DVI outputs.
I split it into a separate patch to simplify the HDMI enabling patch which was
getting huge.

Note that this table is a temporary solution for WR PLL programming. It
will be reworked into a more exact algorithm at a later stage. But for
now, it provides the most accurate clock setting solution, so we use it
here.

Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

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