From: Henry Nestler <henry.nestler@gmail.com>
Date: Tue, 22 Feb 2011 11:29:42 +0000 (+0000)
Subject: DM9000B: Fix PHY power for network down/up
X-Git-Tag: v2.6.38-rc7~47^2~2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=108f518cc4f81eb8e3b46a0bd5cb902ef90a51a8;p=pandora-kernel.git

DM9000B: Fix PHY power for network down/up

DM9000 revision B needs 1 ms delay after PHY power-on.
PHY must be powered on by writing 0 into register DM9000_GPR before
all other settings will change (see Davicom spec and example code).

Remember, that register DM9000_GPR was not changed by reset sequence.

Without this fix the FIFO is out of sync and sends wrong data after
sequence of "ifconfig ethX down ; ifconfig ethX up".

Signed-off-by: David S. Miller <davem@davemloft.net>
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