From: Maxime Coquelin <maxime.coquelin@stericsson.com>
Date: Wed, 23 Jan 2013 10:27:58 +0000 (+0100)
Subject: ARM: mach-ux500: enable 128KB way L2 cache on DB8540
X-Git-Tag: omap-for-v3.10/dt-fixes-for-merge-window~68^2~23^2
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0f2fa40e464c955e928979331625b5485c292bf0;p=pandora-kernel.git

ARM: mach-ux500: enable 128KB way L2 cache on DB8540

DB8540 L2 was configured with 64KB way size, but it has 128KB as AP9540.

Fix this by modifying ux500_l2x0_init() to use 128KB way size for all
cpus in the x540 family.

Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---

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