From: françois romieu <romieu@fr.zoreil.com>
Date: Tue, 17 Apr 2012 11:11:40 +0000 (+0000)
Subject: dmfe: enforce consistent timing delay.
X-Git-Tag: v3.5-rc1~109^2~415
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0c20494050a848af4479dbaa89e632a8c5903cf3;p=pandora-kernel.git

dmfe: enforce consistent timing delay.

The driver does not always use the same timing for what looks like
the same operations.

- DCR0
  Use the same udelay everywhere for reset. Upper bound is 100 us.
- DCR9
  Use 5us delay for srom clock. 1us delay for phy_write_1bit (writes
  PHY_DATA_[01]) are not changed as they stay withing a 2,5MHz MDIO
  clock range.

Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Reviewed-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

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