From: Tomoya MORINAGA Date: Thu, 14 Jul 2011 00:52:38 +0000 (+0900) Subject: pch_dma: Fix CTL register access issue X-Git-Tag: v3.1-rc1~92^2^2~16 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0b052f4a088ddc47a5da23dd733522241314cfb4;p=pandora-kernel.git pch_dma: Fix CTL register access issue Currently, Mode-Control register is accessed by read-modify-write. According to DMA hardware specifications datasheet, prohibits this method. Because this register resets to 0 by DMA HW after DMA transfer completes. Thus, current read-modify-write processing can cause unexpected behavior. The datasheet says in case of writing Mode-Control register, set the value for only target channel, the others must set '11b'. e.g. Set DMA0=01b DMA11=10b CTL0=33333331h CTL2=00002333h NOTE: CTL0 includes DMA0~7 Mode-Control register. CTL2 includes DMA8~11 Mode-Control register. This patch modifies the issue. Signed-off-by: Tomoya MORINAGA Signed-off-by: Vinod Koul --- Reading git-diff-tree failed