From: Thomas Bonnefille Date: Tue, 12 Nov 2024 14:57:38 +0000 (+0100) Subject: board: add support for LicheeRV Nano X-Git-Tag: v2025.04-rc1~17^2~41^2~18 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=04bcc87f0dcc18c9cc6bf2bea90f8c14b44393b4;p=pandora-u-boot.git board: add support for LicheeRV Nano The LicheeRV Nano is a small SBC using the Sophgo SG2002 RISCV SoC. Signed-off-by: Thomas Bonnefille --- diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 043d963f634..a73fe510f73 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -11,6 +11,9 @@ choice config TARGET_ANDES_AE350 bool "Support Andes ae350" +config TARGET_LICHEERV_NANO + bool "Support LicheeRV Nano Board" + config TARGET_MICROCHIP_ICICLE bool "Support Microchip PolarFire-SoC Icicle Board" @@ -92,6 +95,7 @@ source "board/sifive/unleashed/Kconfig" source "board/sifive/unmatched/Kconfig" source "board/sipeed/maix/Kconfig" source "board/sophgo/milkv_duo/Kconfig" +source "board/sophgo/licheerv_nano/Kconfig" source "board/starfive/visionfive2/Kconfig" source "board/thead/th1520_lpi4a/Kconfig" source "board/xilinx/mbv/Kconfig" diff --git a/board/sophgo/licheerv_nano/Kconfig b/board/sophgo/licheerv_nano/Kconfig new file mode 100644 index 00000000000..660d3c5d095 --- /dev/null +++ b/board/sophgo/licheerv_nano/Kconfig @@ -0,0 +1,28 @@ +if TARGET_LICHEERV_NANO + +config SYS_BOARD + default "licheerv_nano" + +config SYS_VENDOR + default "sophgo" + +config SYS_CPU + default "cv1800b" + +config SYS_CONFIG_NAME + default "licheerv_nano" + +config TEXT_BASE + default 0x80200000 + +config ENV_SIZE + default 0x20000 + +config ENV_SECT_SIZE + default 0x40000 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select SOPHGO_CV1800B + +endif diff --git a/board/sophgo/licheerv_nano/MAINTAINERS b/board/sophgo/licheerv_nano/MAINTAINERS new file mode 100644 index 00000000000..c56060db081 --- /dev/null +++ b/board/sophgo/licheerv_nano/MAINTAINERS @@ -0,0 +1,5 @@ +LicheeRV Nano +M: Thomas Bonnefille +S: Maintained +F: board/sophgo/licheerv_nano/ +F: configs/sipeed_licheerv_nano_defconfig diff --git a/board/sophgo/licheerv_nano/Makefile b/board/sophgo/licheerv_nano/Makefile new file mode 100644 index 00000000000..59fcd5bfba9 --- /dev/null +++ b/board/sophgo/licheerv_nano/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2024, Kongyang Liu + +obj-y += board.o diff --git a/board/sophgo/licheerv_nano/board.c b/board/sophgo/licheerv_nano/board.c new file mode 100644 index 00000000000..eaa47be1739 --- /dev/null +++ b/board/sophgo/licheerv_nano/board.c @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2024, Kongyang Liu + */ + +int board_init(void) +{ + return 0; +} diff --git a/configs/sipeed_licheerv_nano_defconfig b/configs/sipeed_licheerv_nano_defconfig new file mode 100644 index 00000000000..14fefa968c6 --- /dev/null +++ b/configs/sipeed_licheerv_nano_defconfig @@ -0,0 +1,47 @@ +CONFIG_RISCV=y +CONFIG_SYS_MALLOC_LEN=0x820000 +CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82300000 +CONFIG_DEFAULT_DEVICE_TREE="sg2002-licheerv-nano-b" +CONFIG_SYS_BOOTM_LEN=0x4000000 +CONFIG_SYS_LOAD_ADDR=0x80080000 +CONFIG_IDENT_STRING="licheerv_nano" +CONFIG_TARGET_LICHEERV_NANO=y +CONFIG_ARCH_RV64I=y +CONFIG_RISCV_SMODE=y +CONFIG_FIT=y +CONFIG_BOOTSTD_FULL=y +# CONFIG_BOOTMETH_EFI_BOOTMGR is not set +CONFIG_SD_BOOT=y +CONFIG_BOOTCOMMAND="run distro_bootcmd" +CONFIG_SYS_CBSIZE=512 +CONFIG_SYS_PBSIZE=544 +CONFIG_SYS_PROMPT="licheerv_nano# " +# CONFIG_CMD_BOOTDEV is not set +CONFIG_CMD_MBR=y +CONFIG_CMD_MMC=y +CONFIG_CMD_POWEROFF=y +# CONFIG_CMD_MII is not set +CONFIG_CMD_SYSBOOT=y +CONFIG_CMD_EXT4_WRITE=y +# CONFIG_ISO_PARTITION is not set +# CONFIG_EFI_PARTITION is not set +CONFIG_ENV_OVERWRITE=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK_SOPHGO_CV1800B=y +CONFIG_MMC=y +CONFIG_MMC_IO_VOLTAGE=y +CONFIG_MMC_UHS_SUPPORT=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_CV1800B=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_SYS_NS16550=y +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SPI=y +CONFIG_CV1800B_SPIF=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_CV1800B=y diff --git a/include/configs/licheerv_nano.h b/include/configs/licheerv_nano.h new file mode 100644 index 00000000000..2ea7943f66f --- /dev/null +++ b/include/configs/licheerv_nano.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2024, Thomas Bonnefille + * + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + +#define CFG_SYS_SDRAM_BASE 0x80000000 + +#define CFG_EXTRA_ENV_SETTINGS "consoledev=ttyS0\0" \ + "baudrate=115200\0" \ + "fdt_addr_r=0x82000000\0" \ + "kernel_addr_r=0x81000000\0" \ + "scriptaddr=0x80c00000\0" \ + BOOTENV + +#endif /* __CONFIG_H */