From: Dylan Hung <dylan_hung@aspeedtech.com>
Date: Mon, 7 Sep 2020 08:25:07 +0000 (+0800)
Subject: ram: add ddr4 dual x8 configuration
X-Git-Tag: v2021.01-rc1~31^2~21
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0474050d467ff282447a460f9226e03ec48a47f0;p=pandora-u-boot.git

ram: add ddr4 dual x8 configuration

the aspeed ddr sdram controller needs to know if the memory chip mounted on
the board is dual x8 die or not. Or it may get the wrong size of the
memory space.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
---

diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig
index a0e859afd6e..a270e13b265 100644
--- a/drivers/ram/Kconfig
+++ b/drivers/ram/Kconfig
@@ -73,6 +73,7 @@ config IMXRT_SDRAM
 	  to support external memories like sdram, psram & nand.
 	  This driver is for the sdram memory interface with the SEMC.
 
+source "drivers/ram/aspeed/Kconfig"
 source "drivers/ram/rockchip/Kconfig"
 source "drivers/ram/sifive/Kconfig"
 source "drivers/ram/stm32mp1/Kconfig"
diff --git a/drivers/ram/aspeed/Kconfig b/drivers/ram/aspeed/Kconfig
new file mode 100644
index 00000000000..020c9131882
--- /dev/null
+++ b/drivers/ram/aspeed/Kconfig
@@ -0,0 +1,10 @@
+if RAM || SPL_RAM
+config ASPEED_DDR4_DUALX8
+	bool "Enable Dual X8 DDR4 die"
+	depends on DM && OF_CONTROL && ARCH_ASPEED
+	default n
+	help
+		Say Y if dual X8 DDR4 die is used on the board.  The aspeed ddr sdram
+		controller needs to know if the memory chip mounted on the board is dual
+		 x8 die or not.  Or it may get the wrong size of the memory space.
+endif
diff --git a/drivers/ram/aspeed/sdram_ast2500.c b/drivers/ram/aspeed/sdram_ast2500.c
index 8536a70a19d..9f4304cb663 100644
--- a/drivers/ram/aspeed/sdram_ast2500.c
+++ b/drivers/ram/aspeed/sdram_ast2500.c
@@ -247,7 +247,7 @@ static int ast2500_sdrammc_init_ddr4(struct dram_info *info)
 	    | SDRAM_PCR_RESETN_DIS
 	    | SDRAM_PCR_RGAP_CTRL_EN | SDRAM_PCR_ODT_EN | SDRAM_PCR_ODT_EXT_EN;
 	const u32 conf = (SDRAM_CONF_CAP_1024M << SDRAM_CONF_CAP_SHIFT)
-#ifdef CONFIG_DUALX8_RAM
+#ifdef CONFIG_ASPEED_DDR4_DUALX8
 	    | SDRAM_CONF_DUALX8
 #endif
 	    | SDRAM_CONF_SCRAMBLE | SDRAM_CONF_SCRAMBLE_PAT2 | SDRAM_CONF_DDR4;