From: Paul Walmsley <paul@pwsan.com>
Date: Tue, 8 Jul 2008 02:55:11 +0000 (-0600)
Subject: OMAP3 clock/SRAM: fix CORE DPLL M2 divider mask
X-Git-Tag: v2.6.26-omap1~28
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=0473ee36850f8e6d2386341764b8eb883f973b82;p=pandora-kernel.git

OMAP3 clock/SRAM: fix CORE DPLL M2 divider mask

3430ES2+ CORE DPLL M2 divider can divide by 1 to 31, unlike ES1, which
was more limited.  The SRAM code currently only supports dividing by 1
or 2, but we should mask off the full range of bits to guard against
the event that the previous contents of CM_CLKSEL_PLL1 included an M2
divider > 2.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---

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