From: Ma Ling <ling.ma@intel.com>
Date: Wed, 18 Mar 2009 12:13:23 +0000 (+0800)
Subject: drm/i915: Use documented PLL timing limits for G4X platform
X-Git-Tag: v2.6.30-rc1~646^2~23
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=044c7c415a68077b7c444c753aa03a35149e881a;p=pandora-kernel.git

drm/i915: Use documented PLL timing limits for G4X platform

The values come from the internal reference spreadsheet on PLL
timing limits for the G4X chipsets.

Part of fixing fd.o bug #17508

Signed-off-by: Ma Ling <ling.ma@intel.com>
[anholt: Cleaned up some whitespace]
Signed-off-by: Eric Anholt <eric@anholt.net>
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