From: Minghuan Lian Date: Fri, 21 Jun 2013 10:59:12 +0000 (+0800) Subject: powerpc/dts: update MSI bindings doc for MPIC v4.3 X-Git-Tag: v3.12-rc1~123^2~110^2~11 X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=03daa99ef50873651e363fc12ae0b5facdb3f831;p=pandora-kernel.git powerpc/dts: update MSI bindings doc for MPIC v4.3 Add compatible "fsl,mpic-msi-v4.3" for MPIC v4.3. MPIC v4.3 contains MSIIR and MSIIR1. MSIIR supports 8 MSI registers and MSIIR1 supports 16 MSI registers, but uses different IBS and SRS shift. When using MSIR1, the interrupt number is not consecutive. It is hard to use 'msi-available-ranges' to describe the ranges of the available interrupt, so MPIC v4.3 does not support this property. Signed-off-by: Minghuan Lian [scottwood@freescale.com: minor grammar fixes] Signed-off-by: Scott Wood --- Reading git-diff-tree failed