From: Roger Quadros <rogerq@ti.com>
Date: Mon, 5 May 2014 09:54:43 +0000 (+0300)
Subject: ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gate
X-Git-Tag: omap-for-v3.16/dt-part2-v2~16
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=032d774575dfed145e4477b47579fd51d9c102b3;p=pandora-kernel.git

ARM: dts: dra7-clock: Add "l3init_960m_gfclk" clock gate

This clock gate description is missing in the older Reference manuals.
It is present on the SoC to provide 960MHz reference clock to the
internal USB PHYs.

Reference: DRA75x_DRA74x_ES1.1_NDA_TRM_vO.pdf, pg. 900,
Table 3-812. CM_COREAON_L3INIT_60M_GFCLK_CLKCTRL

Use l3init_960m_gfclk as parent of usb_otg_ss1_refclk960m and
usb_otg_ss2_refclk960m.

CC: Benoît Cousson <bcousson@baylibre.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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