From: Clemens Ladisch <clemens@ladisch.de>
Date: Mon, 10 Jan 2011 15:09:23 +0000 (+0100)
Subject: ALSA: virtuoso: use lower master clock with H6 daughterboard
X-Git-Tag: v2.6.38-rc1~236^2~2^2~25
X-Git-Url: http://git.openpandora.org/cgi-bin/gitweb.cgi?a=commitdiff_plain;h=00b8dd7dd71ef129176731d5fa24f5e298797599;p=pandora-kernel.git

ALSA: virtuoso: use lower master clock with H6 daughterboard

Because of the unshielded connector cable, it is important to use as low
a master clock frequency as possible with the H6.

For double rate modes (64-96 kHz), the MCLK rate is unconditionally
lowered from 512x to 256x because the higher rate would not improve
anything.

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
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