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[MIPS] Separate performance counter interrupts
authorChris Dearman <chris@mips.com>
Thu, 24 May 2007 21:24:20 +0000 (22:24 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 14 Jun 2007 17:25:15 +0000 (18:25 +0100)
Support for performance counter overflow interrupt that is on a separate
interrupt from the timer.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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