mmc: mmci: Add Qcom datactrl register variant
authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Mon, 2 Jun 2014 09:09:06 +0000 (10:09 +0100)
committerUlf Hansson <ulf.hansson@linaro.org>
Wed, 9 Jul 2014 09:25:54 +0000 (11:25 +0200)
Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
register. Bit position datactrl[16:4] hold the true block size instead of power
of 2.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

No differences found