riscv: dts: th1520: Complete clock tree

Describe the newly-supported clock controller of TH1520 in SoC
devicetree, replace dummy clocks with the controller-supplied ones and
add correct clocks for GPIO controllers.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>

diff --git a/arch/riscv/dts/th1520-lichee-module-4a.dtsi b/arch/riscv/dts/th1520-lichee-module-4a.dtsi
index 20dbc4c..9b255f8 100644 (file)
--- a/arch/riscv/dts/th1520-lichee-module-4a.dtsi
+++ b/arch/riscv/dts/th1520-lichee-module-4a.dtsi
@@ -26,14 +26,6 @@
        clock-frequency = <32768>;
 };
 
-&apb_clk {
-       clock-frequency = <62500000>;
-};
-
-&uart_sclk {
-       clock-frequency = <100000000>;
-};
-
 &emmc {
        bus-width = <8>;
        max-frequency = <198000000>;

diff --git a/arch/riscv/dts/th1520.dtsi b/arch/riscv/dts/th1520.dtsi
index 4a523f8..28107a9 100644 (file)
--- a/arch/riscv/dts/th1520.dtsi
+++ b/arch/riscv/dts/th1520.dtsi
@@ -4,6 +4,7 @@
  * Copyright (C) 2023 Jisheng Zhang <jszhang@kernel.org>
  */
 
+#include <dt-bindings/clock/thead,th1520-clk-ap.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 
 / {
@@ -127,25 +128,6 @@
                #clock-cells = <0>;
        };
 
-       apb_clk: apb-clk-clock {
-               compatible = "fixed-clock";
-               clock-output-names = "apb_clk";
-               #clock-cells = <0>;
-       };
-
-       uart_sclk: uart-sclk-clock {
-               compatible = "fixed-clock";
-               clock-output-names = "uart_sclk";
-               #clock-cells = <0>;
-       };
-
-       sdhci_clk: sdhci-clock {
-               compatible = "fixed-clock";
-               clock-frequency = <198000000>;
-               clock-output-names = "sdhci_clk";
-               #clock-cells = <0>;
-       };
-
        soc {
                compatible = "simple-bus";
                interrupt-parent = <&plic>;
@@ -180,7 +162,8 @@
                        reg = <0xff 0xe7014000 0x0 0x100>;
                        bootph-pre-ram;
                        interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&uart_sclk>;
+                       clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART0_PCLK>;
+                       clock-names = "buadclk", "apb_pclk";
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        status = "disabled";
@@ -190,7 +173,7 @@
                        compatible = "thead,th1520-dwcmshc";
                        reg = <0xff 0xe7080000 0x0 0x10000>;
                        interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&sdhci_clk>;
+                       clocks = <&clk CLK_EMMC_SDIO>;
                        clock-names = "core";
                        status = "disabled";
                };
@@ -199,7 +182,7 @@
                        compatible = "thead,th1520-dwcmshc";
                        reg = <0xff 0xe7090000 0x0 0x10000>;
                        interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&sdhci_clk>;
+                       clocks = <&clk CLK_EMMC_SDIO>;
                        clock-names = "core";
                        status = "disabled";
                };
@@ -208,7 +191,7 @@
                        compatible = "thead,th1520-dwcmshc";
                        reg = <0xff 0xe70a0000 0x0 0x10000>;
                        interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&sdhci_clk>;
+                       clocks = <&clk CLK_EMMC_SDIO>;
                        clock-names = "core";
                        status = "disabled";
                };
@@ -217,7 +200,8 @@
                        compatible = "snps,dw-apb-uart";
                        reg = <0xff 0xe7f00000 0x0 0x100>;
                        interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&uart_sclk>;
+                       clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART1_PCLK>;
+                       clock-names = "buadclk", "apb_pclk";
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        status = "disabled";
@@ -227,7 +211,8 @@
                        compatible = "snps,dw-apb-uart";
                        reg = <0xff 0xe7f04000 0x0 0x100>;
                        interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&uart_sclk>;
+                       clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART3_PCLK>;
+                       clock-names = "buadclk", "apb_pclk";
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        status = "disabled";
@@ -236,6 +221,8 @@
                gpio2: gpio@ffe7f34000 {
                        compatible = "snps,dw-apb-gpio";
                        reg = <0xff 0xe7f34000 0x0 0x1000>;
+                       clocks = <&clk CLK_GPIO2>;
+                       clock-names = "bus";
                        #address-cells = <1>;
                        #size-cells = <0>;
 
@@ -254,6 +241,8 @@
                gpio3: gpio@ffe7f38000 {
                        compatible = "snps,dw-apb-gpio";
                        reg = <0xff 0xe7f38000 0x0 0x1000>;
+                       clocks = <&clk CLK_GPIO3>;
+                       clock-names = "bus";
                        #address-cells = <1>;
                        #size-cells = <0>;
 
@@ -272,6 +261,8 @@
                gpio0: gpio@ffec005000 {
                        compatible = "snps,dw-apb-gpio";
                        reg = <0xff 0xec005000 0x0 0x1000>;
+                       clocks = <&clk CLK_GPIO0>;
+                       clock-names = "bus";
                        #address-cells = <1>;
                        #size-cells = <0>;
 
@@ -290,6 +281,8 @@
                gpio1: gpio@ffec006000 {
                        compatible = "snps,dw-apb-gpio";
                        reg = <0xff 0xec006000 0x0 0x1000>;
+                       clocks = <&clk CLK_GPIO1>;
+                       clock-names = "bus";
                        #address-cells = <1>;
                        #size-cells = <0>;
 
@@ -309,16 +302,24 @@
                        compatible = "snps,dw-apb-uart";
                        reg = <0xff 0xec010000 0x0 0x4000>;
                        interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&uart_sclk>;
+                       clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART2_PCLK>;
+                       clock-names = "buadclk", "apb_pclk";
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        status = "disabled";
                };
 
+               clk: clock-controller@ffef010000 {
+                       compatible = "thead,th1520-clk-ap";
+                       reg = <0xff 0xef010000 0x0 0x1000>;
+                       clocks = <&osc>;
+                       #clock-cells = <1>;
+               };
+
                timer0: timer@ffefc32000 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xefc32000 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
@@ -327,7 +328,7 @@
                timer1: timer@ffefc32014 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xefc32014 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
@@ -336,7 +337,7 @@
                timer2: timer@ffefc32028 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xefc32028 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
@@ -345,7 +346,7 @@
                timer3: timer@ffefc3203c {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xefc3203c 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
@@ -355,7 +356,8 @@
                        compatible = "snps,dw-apb-uart";
                        reg = <0xff 0xf7f08000 0x0 0x4000>;
                        interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&uart_sclk>;
+                       clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART4_PCLK>;
+                       clock-names = "buadclk", "apb_pclk";
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        status = "disabled";
@@ -365,7 +367,8 @@
                        compatible = "snps,dw-apb-uart";
                        reg = <0xff 0xf7f0c000 0x0 0x4000>;
                        interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&uart_sclk>;
+                       clocks = <&clk CLK_UART_SCLK>, <&clk CLK_UART5_PCLK>;
+                       clock-names = "buadclk", "apb_pclk";
                        reg-shift = <2>;
                        reg-io-width = <4>;
                        status = "disabled";
@@ -384,7 +387,7 @@
                timer4: timer@ffffc33000 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xffc33000 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
@@ -393,7 +396,7 @@
                timer5: timer@ffffc33014 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xffc33014 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <21 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
@@ -402,7 +405,7 @@
                timer6: timer@ffffc33028 {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xffc33028 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
@@ -411,7 +414,7 @@
                timer7: timer@ffffc3303c {
                        compatible = "snps,dw-apb-timer";
                        reg = <0xff 0xffc3303c 0x0 0x14>;
-                       clocks = <&apb_clk>;
+                       clocks = <&clk CLK_PERI_APB_PCLK>;
                        clock-names = "timer";
                        interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";