drm/radeon: drop drivers copy of the rptr

In all cases where it really matters we are using the read functions anyway.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 2b31c32..835dcfb 100644 (file)
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -4031,8 +4031,6 @@ static int cik_cp_gfx_resume(struct radeon_device *rdev)
        WREG32(CP_RB0_BASE, rb_addr);
        WREG32(CP_RB0_BASE_HI, upper_32_bits(rb_addr));
 
-       ring->rptr = RREG32(CP_RB0_RPTR);
-
        /* start the ring */
        cik_cp_gfx_start(rdev);
        rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready = true;
@@ -4587,8 +4585,7 @@ static int cik_cp_compute_resume(struct radeon_device *rdev)
                rdev->ring[idx].wptr = 0;
                mqd->queue_state.cp_hqd_pq_wptr = rdev->ring[idx].wptr;
                WREG32(CP_HQD_PQ_WPTR, mqd->queue_state.cp_hqd_pq_wptr);
-               rdev->ring[idx].rptr = RREG32(CP_HQD_PQ_RPTR);
-               mqd->queue_state.cp_hqd_pq_rptr = rdev->ring[idx].rptr;
+               mqd->queue_state.cp_hqd_pq_rptr = RREG32(CP_HQD_PQ_RPTR);
 
                /* set the vmid for the queue */
                mqd->queue_state.cp_hqd_vmid = 0;
@@ -5118,7 +5115,7 @@ bool cik_gfx_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
        if (!(reset_mask & (RADEON_RESET_GFX |
                            RADEON_RESET_COMPUTE |
                            RADEON_RESET_CP))) {
-               radeon_ring_lockup_update(ring);
+               radeon_ring_lockup_update(rdev, ring);
                return false;
        }
        /* force CP activities */

diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c
index 1ecb3f1..e474760 100644 (file)
--- a/drivers/gpu/drm/radeon/cik_sdma.c
+++ b/drivers/gpu/drm/radeon/cik_sdma.c
@@ -362,8 +362,6 @@ static int cik_sdma_gfx_resume(struct radeon_device *rdev)
                ring->wptr = 0;
                WREG32(SDMA0_GFX_RB_WPTR + reg_offset, ring->wptr << 2);
 
-               ring->rptr = RREG32(SDMA0_GFX_RB_RPTR + reg_offset) >> 2;
-
                /* enable DMA RB */
                WREG32(SDMA0_GFX_RB_CNTL + reg_offset, rb_cntl | SDMA_RB_ENABLE);
 
@@ -713,7 +711,7 @@ bool cik_sdma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring)
                mask = RADEON_RESET_DMA1;
 
        if (!(reset_mask & mask)) {
-               radeon_ring_lockup_update(ring);
+               radeon_ring_lockup_update(rdev, ring);
                return false;
        }
        /* force ring activities */

diff --cc drivers/gpu/drm/radeon/evergreen.c
Simple merge

diff --cc drivers/gpu/drm/radeon/evergreen_dma.c
Simple merge

diff --cc drivers/gpu/drm/radeon/ni.c
Simple merge

diff --cc drivers/gpu/drm/radeon/ni_dma.c
Simple merge

diff --cc drivers/gpu/drm/radeon/r100.c
Simple merge

diff --cc drivers/gpu/drm/radeon/r600.c
Simple merge

diff --cc drivers/gpu/drm/radeon/r600_dma.c
Simple merge

diff --cc drivers/gpu/drm/radeon/radeon.h
Simple merge

diff --cc drivers/gpu/drm/radeon/radeon_ring.c
Simple merge

diff --cc drivers/gpu/drm/radeon/si.c
Simple merge

diff --cc drivers/gpu/drm/radeon/si_dma.c
Simple merge

diff --cc drivers/gpu/drm/radeon/uvd_v1_0.c
Simple merge

diff --cc drivers/gpu/drm/radeon/vce_v1_0.c
Simple merge