arch/tile: Enable more sophisticated IRQ model for 32-bit chips.
authorChris Metcalf <cmetcalf@tilera.com>
Fri, 25 Jun 2010 20:41:11 +0000 (16:41 -0400)
committerChris Metcalf <cmetcalf@tilera.com>
Tue, 6 Jul 2010 17:34:01 +0000 (13:34 -0400)
This model is based on the on-chip interrupt model used by the
TILE-Gx next-generation hardware, and interacts much more cleanly
with the Linux generic IRQ layer.

The change includes modifications to the Tilera hypervisor, which
are reflected in the hypervisor headers in arch/tile/include/arch/.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>

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