AVB_AVTP_MATCH_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
/* - CANFD0 ----------------------------------------------------------------- */
static const unsigned int canfd0_data_a_pins[] = {
/* CANFD0_TX, CANFD0_RX */
static const unsigned int du_disp_mux[] = {
DU_DISP_MARK,
};
+#endif
/* - GETHER ----------------------------------------------------------------- */
static const unsigned int gether_link_a_pins[] = {
SDA5_MARK, SCL5_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
/* - INTC-EX ---------------------------------------------------------------- */
static const unsigned int intc_ex_irq0_pins[] = {
/* IRQ0 */
static const unsigned int intc_ex_irq5_mux[] = {
IRQ5_MARK,
};
+#endif
/* - MMC -------------------------------------------------------------------- */
static const unsigned int mmc_data_pins[] = {
MMC_DS_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
/* - MSIOF0 ----------------------------------------------------------------- */
static const unsigned int msiof0_clk_pins[] = {
/* MSIOF0_SCK */
static const unsigned int pwm4_b_mux[] = {
PWM4_B_MARK,
};
+#endif
/* - QSPI0 ------------------------------------------------------------------ */
static const unsigned int qspi0_ctrl_pins[] = {
TPU0TO3_MARK,
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
/* - VIN0 ------------------------------------------------------------------- */
static const unsigned int vin0_data_pins[] = {
RCAR_GP_PIN(2, 4), RCAR_GP_PIN(2, 5),
static const unsigned int vin1_clk_mux[] = {
VI1_CLK_MARK,
};
+#endif
static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(avb_link),
SH_PFC_PIN_GROUP(avb_avtp_pps),
SH_PFC_PIN_GROUP(avb_avtp_capture),
SH_PFC_PIN_GROUP(avb_avtp_match),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_PIN_GROUP(canfd0_data_a),
SH_PFC_PIN_GROUP(canfd0_data_b),
SH_PFC_PIN_GROUP(canfd1_data),
SH_PFC_PIN_GROUP(du_oddf),
SH_PFC_PIN_GROUP(du_cde),
SH_PFC_PIN_GROUP(du_disp),
+#endif
SH_PFC_PIN_GROUP(gether_link_a),
SH_PFC_PIN_GROUP(gether_phy_int_a),
SH_PFC_PIN_GROUP(gether_mdio_a),
SH_PFC_PIN_GROUP(i2c3),
SH_PFC_PIN_GROUP(i2c4),
SH_PFC_PIN_GROUP(i2c5),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_PIN_GROUP(intc_ex_irq0),
SH_PFC_PIN_GROUP(intc_ex_irq1),
SH_PFC_PIN_GROUP(intc_ex_irq2),
SH_PFC_PIN_GROUP(intc_ex_irq3),
SH_PFC_PIN_GROUP(intc_ex_irq4),
SH_PFC_PIN_GROUP(intc_ex_irq5),
+#endif
BUS_DATA_PIN_GROUP(mmc_data, 1),
BUS_DATA_PIN_GROUP(mmc_data, 4),
BUS_DATA_PIN_GROUP(mmc_data, 8),
SH_PFC_PIN_GROUP(mmc_cd),
SH_PFC_PIN_GROUP(mmc_wp),
SH_PFC_PIN_GROUP(mmc_ds),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_PIN_GROUP(msiof0_clk),
SH_PFC_PIN_GROUP(msiof0_sync),
SH_PFC_PIN_GROUP(msiof0_ss1),
SH_PFC_PIN_GROUP(pwm3_b),
SH_PFC_PIN_GROUP(pwm4_a),
SH_PFC_PIN_GROUP(pwm4_b),
+#endif
SH_PFC_PIN_GROUP(qspi0_ctrl),
SH_PFC_PIN_GROUP_SUBSET(qspi0_data2, rpc_data, 0, 2),
SH_PFC_PIN_GROUP_SUBSET(qspi0_data4, rpc_data, 0, 4),
SH_PFC_PIN_GROUP(tpu_to1),
SH_PFC_PIN_GROUP(tpu_to2),
SH_PFC_PIN_GROUP(tpu_to3),
+#ifdef CONFIG_PINCTRL_PFC_FULL
BUS_DATA_PIN_GROUP(vin0_data, 8),
BUS_DATA_PIN_GROUP(vin0_data, 10),
BUS_DATA_PIN_GROUP(vin0_data, 12),
SH_PFC_PIN_GROUP(vin1_field),
SH_PFC_PIN_GROUP(vin1_clkenb),
SH_PFC_PIN_GROUP(vin1_clk),
+#endif
};
static const char * const avb_groups[] = {
"avb_avtp_match",
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
static const char * const canfd0_groups[] = {
"canfd0_data_a",
"canfd0_data_b",
"du_cde",
"du_disp",
};
+#endif
static const char * const gether_groups[] = {
"gether_link_a",
"i2c5",
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
static const char * const intc_ex_groups[] = {
"intc_ex_irq0",
"intc_ex_irq1",
"intc_ex_irq4",
"intc_ex_irq5",
};
+#endif
static const char * const mmc_groups[] = {
"mmc_data1",
"mmc_ds",
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
static const char * const msiof0_groups[] = {
"msiof0_clk",
"msiof0_sync",
"pwm4_a",
"pwm4_b",
};
+#endif
static const char * const qspi0_groups[] = {
"qspi0_ctrl",
"tpu_to3",
};
+#ifdef CONFIG_PINCTRL_PFC_FULL
static const char * const vin0_groups[] = {
"vin0_data8",
"vin0_data10",
"vin1_clkenb",
"vin1_clk",
};
+#endif
static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(avb),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_FUNCTION(canfd0),
SH_PFC_FUNCTION(canfd1),
SH_PFC_FUNCTION(canfd_clk),
SH_PFC_FUNCTION(du),
+#endif
SH_PFC_FUNCTION(gether),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
SH_PFC_FUNCTION(i2c3),
SH_PFC_FUNCTION(i2c4),
SH_PFC_FUNCTION(i2c5),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_FUNCTION(intc_ex),
+#endif
SH_PFC_FUNCTION(mmc),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_FUNCTION(msiof0),
SH_PFC_FUNCTION(msiof1),
SH_PFC_FUNCTION(msiof2),
SH_PFC_FUNCTION(pwm2),
SH_PFC_FUNCTION(pwm3),
SH_PFC_FUNCTION(pwm4),
+#endif
SH_PFC_FUNCTION(qspi0),
SH_PFC_FUNCTION(qspi1),
SH_PFC_FUNCTION(rpc),
SH_PFC_FUNCTION(scif_clk),
SH_PFC_FUNCTION(tmu),
SH_PFC_FUNCTION(tpu),
+#ifdef CONFIG_PINCTRL_PFC_FULL
SH_PFC_FUNCTION(vin0),
SH_PFC_FUNCTION(vin1),
+#endif
};
static const struct pinmux_cfg_reg pinmux_config_regs[] = {