ia64: io: implement dummy relaxed accessor macros for writes
authorWill Deacon <will.deacon@arm.com>
Tue, 3 Sep 2013 18:10:11 +0000 (19:10 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 20 Oct 2014 17:49:17 +0000 (18:49 +0100)
write{b,w,l,q}_relaxed are implemented by some architectures in order to
permit memory-mapped I/O accesses with weaker barrier semantics than the
non-relaxed variants.

This patch adds dummy macros for the write accessors to ia64, which may
be able to be optimised in a similar manner to the relaxed read
accessors at a later date.

Cc: Tony Luck <tony.luck@intel.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

No differences found