clk: exynos5250: register APLL rate table
authorAndrew Bresticker <abrestic@chromium.org>
Fri, 8 Nov 2013 10:14:08 +0000 (15:44 +0530)
committerTomasz Figa <t.figa@samsung.com>
Wed, 8 Jan 2014 17:01:49 +0000 (18:01 +0100)
Register the APLL rate table so that we can set the APLL rate from
the cpufreq driver.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
drivers/clk/samsung/clk-exynos5250.c

Simple merge