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MIPS: SEAD3: Enable LL/SC.
author
Ralf Baechle
<ralf@linux-mips.org>
Tue, 12 Mar 2013 15:06:07 +0000
(16:06 +0100)
committer
Ralf Baechle
<ralf@linux-mips.org>
Tue, 12 Mar 2013 17:58:09 +0000
(18:58 +0100)
All synthesizable CPU cores that could be loaded into a SEAD3's FPGA are
MIPS32 or MIPS64 CPUs that have ll/sc.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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