arm: dts: agilex5: Enabled cdns-nand dts setting
authorDinesh Maniyam <dinesh.maniyam@intel.com>
Wed, 26 Feb 2025 16:18:16 +0000 (00:18 +0800)
committerMichael Trimarchi <michael@amarulasolutions.com>
Sat, 15 Mar 2025 09:35:00 +0000 (10:35 +0100)
Enable cdns-nand dts setting for the socfpga_agilex5
family device.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
arch/arm/dts/socfpga_agilex5.dtsi
arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi
arch/arm/dts/socfpga_agilex5_socdk.dts

index 03b5504..64665e4 100644 (file)
                        status = "disabled";
                };
 
+               nand: nand@10b80000 {
+                       compatible = "cdns,nand";
+                       reg = <0x10b80000 0x10000>,
+                               <0x10840000 0x1000>;
+                       reg-names = "reg", "sdma";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 97 4>;
+                       clocks = <&clkmgr AGILEX5_NAND_CLK>;
+                       resets = <&rst NAND_RESET>, <&rst COMBOPHY_RESET>;
+                       cdns,board-delay-ps = <4830>;
+                       status = "disabled";
+               };
+
                ocram: sram@00000000 {
                        compatible = "mmio-sram";
                        reg = <0x00000000 0x200000>;
index 9eb21d6..23e0354 100644 (file)
        /delete-property/ cdns,read-delay;
 };
 
+&flash1 {
+       bootph-all;
+};
+
 &i3c0 {
        bootph-all;
 };
        status = "okay";
 };
 
+&nand {
+       bootph-all;
+};
+
 &timer0 {
        bootph-all;
 };
 &watchdog0 {
        bootph-all;
 };
-
index 852e1e5..976656a 100644 (file)
                };
        };
 };
+
+&nand {
+       status = "okay";
+
+       flash1: flash@0 {
+               reg = <0>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               partition@0 {
+                       label = "u-boot";
+                       reg = <0 0x200000>;
+               };
+               partition@200000 {
+                       label = "root";
+                       reg = <0x200000 0x3fe00000>;
+               };
+       };
+};