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wl18xx: fix boot process in high temperature environment
authorVictor Goldenshtein <victorg@ti.com>
Tue, 17 Sep 2013 15:41:28 +0000 (18:41 +0300)
committerLuciano Coelho <luciano.coelho@intel.com>
Mon, 30 Sep 2013 18:12:21 +0000 (21:12 +0300)
In addition to existing WCS PLL configuration add and enable
also the coex PLL during init phase. This fixes boot failures
due to silicon latchup in high temperature environment (>85c).

Signed-off-by: Victor Goldenshtein <victorg@ti.com>
Signed-off-by: Nadim Zubidat <nadimz@ti.com>
Signed-off-by: Eliad Peller <eliad@wizery.com>
Signed-off-by: Luciano Coelho <luciano.coelho@intel.com>

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