clk: st: STiH407: Support for clockgenA0
authorGabriel FERNANDEZ <gabriel.fernandez@st.com>
Tue, 15 Jul 2014 15:20:24 +0000 (17:20 +0200)
committerMike Turquette <mturquette@linaro.org>
Tue, 29 Jul 2014 05:36:34 +0000 (22:36 -0700)
The patch added support for DT registration of ClockGenA0
It includes c32 type PLL.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/st/clkgen-pll.c

Simple merge