ASoC: rsnd: set DIV_EN register on rsnd_adg_set_convert_clk_gen2()

DIV_EN register enable bit is required when you use Gen2 SRC

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

diff --cc sound/soc/sh/rcar/adg.c
Simple merge

diff --cc sound/soc/sh/rcar/gen.c
Simple merge

diff --cc sound/soc/sh/rcar/rsnd.h
Simple merge