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ASoC: rsnd: set DIV_EN register on rsnd_adg_set_convert_clk_gen2()
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Wed, 12 Feb 2014 05:04:12 +0000 (21:04 -0800)
committerMark Brown <broonie@linaro.org>
Wed, 12 Feb 2014 11:59:35 +0000 (11:59 +0000)
DIV_EN register enable bit is required when you use Gen2 SRC

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

No differences found
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