arm: dts: k3-j7200-r5-common: Add HBMC overrides for R5 SPL
authorVaishnav Achath <vaishnav.a@ti.com>
Fri, 29 Nov 2024 11:31:31 +0000 (17:01 +0530)
committerTom Rini <trini@konsulko.com>
Sat, 14 Dec 2024 15:34:16 +0000 (09:34 -0600)
Add 32-bit address overrides for Hyper Bus Memory Controller
for Hyperflash to be functional in R5 SPL.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
arch/arm/dts/k3-j7200-r5-common-proc-board.dts

index f096b10..aeb5040 100644 (file)
                 <0x0 0x50000000 0x0 0x50000000 0x0 0x08000000>;
 };
 
+&hbmc {
+       reg = <0x0 0x47040000 0x0 0x100>,
+               <0x0 0x50000000 0x0 0x8000000>;
+       ranges = <0x0 0x0 0x0 0x50000000 0x4000000>,
+               <0x1 0x0 0x0 0x54000000 0x800000>;
+};
+
 &mcu_ringacc {
     ti,sci = <&dm_tifs>;
 };