OMAP4: clocks: Fix the clksel_rate struct DPLL divs
authorRajendra Nayak <rnayak@ti.com>
Wed, 20 Jan 2010 00:30:55 +0000 (17:30 -0700)
committerPaul Walmsley <paul@pwsan.com>
Wed, 20 Jan 2010 20:35:28 +0000 (13:35 -0700)
For all DPLL's the valid dividers are same as the values
to be programmed in the register. 0 is an invalid value.
The changes are generated by updating the script which autogenerates
the file modifed in the patch.

Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

No differences found