[POWERPC] Hide resources on Axon PCIE root complex nodes
authorMichael Ellerman <michael@ellerman.id.au>
Wed, 19 Mar 2008 06:10:55 +0000 (17:10 +1100)
committerPaul Mackerras <paulus@samba.org>
Wed, 19 Mar 2008 23:15:13 +0000 (10:15 +1100)
The PCI bridge representing the PCIE root complex on Axon, contains
device BARs for a memory range and ROM that define inbound accesses.
This confuses the kernel resource management code -- the resources
need to be hidden when Axon is a host bridge.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>

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