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V4L/DVB (11326): mt9m001: fix advertised pixel clock polarity
authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Tue, 31 Mar 2009 06:44:22 +0000 (03:44 -0300)
committerMauro Carvalho Chehab <mchehab@redhat.com>
Tue, 7 Apr 2009 00:43:48 +0000 (21:43 -0300)
MT9M001 datasheet says, that the data is ready on the falling edge of the pixel
clock, but the driver wrongly sets the SOCAM_PCLK_SAMPLE_RISING flag. Changing
this doesn't seem to produce any visible difference, still, it is better to
comply to the datasheet.

Reported-by: Sascha Oppermann <oppermann@garage-computers.com>
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

No differences found
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