drm/i915/bdw: get the correct LCPLL frequency on Broadwell
authorPaulo Zanoni <paulo.r.zanoni@intel.com>
Sun, 3 Nov 2013 04:07:36 +0000 (21:07 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 8 Nov 2013 17:09:54 +0000 (18:09 +0100)
v2: Rebased onto Paulo's MHz->kHz change.

v3: Rebased on top of the Haswell pc8+ adjustements.

v4: Use the exact 337.5MHz clock, should have been done as part of v2.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> (v1)
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_ddi.c

Simple merge
Simple merge