phycore-imx8mp: Enable CAAM in spl
authorLeonard Anderweit <l.anderweit@phytec.de>
Fri, 17 Jan 2025 13:20:13 +0000 (14:20 +0100)
committerFabio Estevam <festevam@gmail.com>
Mon, 20 Jan 2025 11:41:38 +0000 (08:41 -0300)
Enable CAAM in spl.

Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
board/phytec/phycore_imx8mp/spl.c
configs/phycore-imx8mp_defconfig

index 0610d8b..cb8e450 100644 (file)
@@ -165,6 +165,8 @@ int power_init_board(void)
 
 void spl_board_init(void)
 {
+       arch_misc_init();
+
        /* Set GIC clock to 500Mhz for OD VDD_SOC. */
        clock_enable(CCGR_GIC, 0);
        clock_set_target_val(GIC_CLK_ROOT, CLK_ROOT_ON | CLK_ROOT_SOURCE_SEL(5));
index ba716a6..c050190 100644 (file)
@@ -52,7 +52,6 @@ CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x42200000
 CONFIG_SPL_SYS_MALLOC_SIZE=0x80000
 CONFIG_SPL_SYS_MMCSD_RAW_MODE=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
-# CONFIG_SPL_CRYPTO is not set
 CONFIG_SPL_I2C=y
 CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_SPL_POWER=y
@@ -180,4 +179,3 @@ CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0525
 CONFIG_USB_GADGET_PRODUCT_NUM=0xa4a5
 CONFIG_IMX_WATCHDOG=y
-# CONFIG_SPL_SHA_HW_ACCEL is not set