dts: vt8500: Correct reference clock on WM8850 SoCs
authorTony Prisk <linux@prisktech.co.nz>
Fri, 17 May 2013 09:30:05 +0000 (21:30 +1200)
committerTony Prisk <linux@prisktech.co.nz>
Mon, 3 Jun 2013 19:31:22 +0000 (07:31 +1200)
WM8850 SoCs use a 24Mhz reference clock for the PLLs but the SoC file
currently parents all PLLs to the 25Mhz reference clock.

This patch corrects the PLL parent clock references.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>

No differences found