iommu: add ARM LPAE page table allocator

A number of IOMMUs found in ARM SoCs can walk architecture-compatible
page tables.

This patch adds a generic allocator for Stage-1 and Stage-2 v7/v8
long-descriptor page tables. 4k, 16k and 64k pages are supported, with
up to 4-levels of walk to cover a 48-bit address space.

Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index 3589d67..00b2786 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1589,6 +1589,7 @@ M:        Will Deacon <will.deacon@arm.com>
 L:     linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:     Maintained
 F:     drivers/iommu/arm-smmu.c
+F:     drivers/iommu/io-pgtable-arm.c
 
 ARM64 PORT (AARCH64 ARCHITECTURE)
 M:     Catalin Marinas <catalin.marinas@arm.com>

diff --cc drivers/iommu/Kconfig
Simple merge

diff --cc drivers/iommu/Makefile
Simple merge

diff --cc drivers/iommu/io-pgtable-arm.c
Simple merge

diff --cc drivers/iommu/io-pgtable.c
Simple merge

diff --cc drivers/iommu/io-pgtable.h
Simple merge