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arm64: zynqmp: Update ECAM size to discover up to 256 buses
authorThippeswamy Havalige <thippeswamy.havalige@amd.com>
Mon, 11 Sep 2023 14:10:50 +0000 (16:10 +0200)
committerMichal Simek <michal.simek@amd.com>
Thu, 21 Sep 2023 11:20:11 +0000 (13:20 +0200)
Update ECAM size to discover up to 256 buses

Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Acked-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/087391c3e1f60b0a765fca081d47ce632fda8f06.1694441445.git.michal.simek@amd.com
arch/arm/dts/zynqmp.dtsi patch | blob | history

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index a718757..79c5af2 100644 (file)
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -678,7 +678,7 @@
                        msi-parent = <&pcie>;
                        reg = <0x0 0xfd0e0000 0x0 0x1000>,
                              <0x0 0xfd480000 0x0 0x1000>,
-                             <0x80 0x00000000 0x0 0x1000000>;
+                             <0x80 0x00000000 0x0 0x10000000>;
                        reg-names = "breg", "pcireg", "cfg";
                        ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */
                                 <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */
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